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publication number s71pl-n_00 revision a amendment 9 issue date december 8, 2006 s71pl-n mirrorbit tm mcps s71pl-n mirrorbit tm mcps cover sheet s71pl256n, S71PL127N, s71pl129n 256/128/128 megabit (16/8/8 m x 16-bit) cmos 3.0 volt-only simultaneous read/write, page mode flash memory data sheet notice to readers: this document states the current technical specifications regarding the spansion product(s) described herein. each product described herein may be designated as advance information, preliminary, or full production. see notice on data sheet designations for definitions.
ii s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet notice on data sheet designations spansion inc. issues data sheets with advance information or preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. in all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. the following descriptions of spansion data sheet designations are presented here to highlight their presence and definitions. advance information the advance information designation indicates that spansion inc. is developing one or more specific products, but has not committed any design to production. information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. spansion inc. therefore places the following conditions upon advance information content: ?this document contains information on one or more products under development at spansion inc. the information is intended to help you evaluate this product. do not design in this product without contacting the factory. spansion inc. reserves the right to change or discontinue work on this proposed product without notice.? preliminary the preliminary designation indicates that the product development has progressed such that a commitment to production has taken place. this designation covers several aspects of the product life cycle, including product qualification, initial production, and the subsequent phases in the manufacturing process that occur before full production is achieved. changes to the technical specifications presented in a preliminary document should be expected while keeping these aspects of production under consideration. spansion places the following conditions upon preliminary content: ?this document states the current technical specifications regarding the spansion product(s) described herein. the preliminary status of this document indicates that product qualification has been completed, and that initial production has begun. due to the phases of the manufacturing process that require maintaining efficiency and quality, this document may be revised by subsequent versions or modifications due to changes in technical specifications.? combination some data sheets contain a combination of products with different designations (advance information, preliminary, or full production). this type of document distinguishes these products and their designations wherever necessary, typically on the first page, the ordering information page, and pages with the dc characteristics table and the ac erase and program table (in the table notes). the disclaimer on the first page refers the reader to the notice on this page. full production (no designation on document) when a product has been in production for a period of time such that no changes or only nominal changes are expected, the preliminary designation is removed from the data sheet. nominal changes may include those affecting the number of ordering part numbers available, such as the addition or deletion of a speed option, temperature range, package type, or v io range. changes may also include those needed to clarify a description or to correct a typographical error or incorrect specification. spansion inc. applies the following conditions to documents in this category: ?this document states the current technical specifications regarding the spansion product(s) described herein. spansion inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. however, typographical or specification corrections, or modifications to the valid combinations offered may occur.? questions regarding these document designations may be directed to your local sales office.
publication number s71pl-n_00 revision a amendment 9 issue date december 8, 2006 features ? speed ? flash: 70 ns ? psram: 70 ns ? 8.0 x 11.6 x 1.2 mm packages ? 84-ball fine-pitch ball grid array (fbga) s71pl256nc0 s71pl256nd0 ? 64 ball fine-pitch ball grid array (fbga) s71pl129nb0 s71pl129nc0 S71PL127Nb0 S71PL127Nc0 ? speed ? flash: 70 ns ? psram: 70 ns ? operating temperature range ? temperature range of ?25c to +85c general description this document contains information for the s71pl-n mirrorbit mcp product. for detailed specifications, please refer to the individual data sheets: s71pl-n mirrorbit tm mcps s71pl256n, S71PL127N, s71pl129n 256/128/128 megabit (16/8/8 m x 16-bit) cmos 3.0 volt-only simultaneous read/write, page mode flash memory data sheet document publication identification number (pid) s29pl-n s29pl-n_00 32m psram type 8 psram_31 32m psram type 7 psram_29 32m psram type 2 psram_19 64m psram type 2 psram_20 64m psram type 8 psram_32 128m psram type 2 psram_15
2 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet 1. flash/ram combinations table 2. product selector guide psram density 32 mb 64 mb 128 mb flash density pl127n S71PL127Nb0 S71PL127Nc0 pl129n s71pl129nb0 s71pl129nc0 pl256n s71pl256nc0 s71pl256nd0 device psram density psram type S71PL127Nb0 32 mb psram type 2 S71PL127Nb0 32 mb psram type 7 S71PL127Nb0 32 mb psram type 8 S71PL127Nc0 64 mb psram type 2 S71PL127Nc0 64 mb psram type 8 s71pl129nb0 32 mb psram type 2 s71pl129nb0 32 mb psram type 7 s71pl129nb0 32 mb psram type 8 s71pl129nc0 64 mb psram type 2 s71pl129nc0 64 mb psram type 8 s71pl256nc0 64 mb psram type 2 s71pl256nc0 64 mb psram type 8 s71pl256nd0 128 mb psram type 2
december 8, 2006 s71pl-n_00_a9 s71pl-n mirrorbit tm mcps 3 data sheet 3. ordering information the order number is formed by a valid combinations of the following: 3.1 valid combinations valid combinations list configurations planned to be supported in volume for this device. consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. notes: 1. type 0 is standard. specify other options as required. 2. bga package marking omits leading ?s? and packing type designator from ordering part number. 3. contact factory for availability for any of the opns listed since ram type availability may vary over time. s71pl 256 n c0 hf w 5b 0 packing type 0=tray 2 = 7? tape and reel 3 = 13? tape and reel model number (v io range, package type) refer to the valid combinations table below temperature range w = wireless (?25c to +85c) package type & material set ha = mcp bga, 1.2 mm height, 0.8 mm pitch, lead (pb)-free compliant package hf = mcp bga, 1.2 mm height, 0.8 mm pitch, lead (pb)-free package psram density b0 = 32 mb psram c0 = 64 mb psram d0 = 128 mb psram process technology n = 110 nm mirrorbit? technology flash density 256= 256 mb 129= 128 mb (dual ce#) 127= 128 mb (single ce#) product family s71pl =3.0 volt-only simultaneous read/write, page mode flash memory table 3.1 valid combinations base ordering part number (2) package & temperature model number packing type psram type flash speed option psram speed options package name S71PL127Nb0 haw, hfw 4b 0, 2, 3 (1) , (2) ty p e 2 70 ns 70 ns tla064 - 8 x 11.6 x 1.2 mm, 64-ball 4u type 8 4z type 7 S71PL127Nc0 4b type 2 4u type 8 s71pl129nb0 4b type 2 tla064 - 8 x 11.6 x 1.2 mm, 64-ball 4u type 8 4z type 7 s71pl129nc0 4b type 2 4u type 8 s71pl256nc0 5b type 2 tla084- 8 x 11.6 x 1.2 mm, 84-ball 5u type 8 s71pl256nd0 5b type 2 tsb084 - 8 x 11.6 x 1.2, 84-ball
4 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet 4. block diagram notes: 1. ry/by# is an open drain output. 2. a max = a23 (pl256n), a22 (pl127n), a21 (pl129n). v ss reset# flash 1 io 15 -io 0 v cc f dq 15 to dq 0 ry/by# wp#/acc v cc v cc f1-ce# flash-only address shared address oe# we# v ccs v cc ce#s ub#s lb#s ce# ub# lb# psram/sram ce2
december 8, 2006 s71pl-n_00_a9 s71pl-n mirrorbit tm mcps 5 data sheet 5. physical dimensions/connection diagrams this section shows the i/o designations and package specifications for the s71pl-n. 5.1 special handling instructions for fbga package special handling is required for flash memory products in fbga packages. flash memory devices in fbga packages may be damaged if exposed to ultrasonic cleaning methods. the package and/or data integrity may be compromised if the package body is exposed to temperatures above 150c for prolonged periods of time. 5.2 s71pl256n tla084/tsb084 figure 5.1 84-ball fine-pitch ball grid array (s71pl256n) note: top view?balls facing down. the addresses that are shared vary by mcp combination as shown in the table below: flash-only addresses shared addresses s71pl256nc0 a23-a22 a21:a0 s71pl256nd0 a23 a22:a0 legend: psram only dnu (do not use) all shared flash only x x x x x x x x b2 b3 b4 b5 b6 b7 b8 b9 rfu rfu rfu rfu rfu rfu rfu rfu c2 c9 a7 a11 a8 we# r-lb# rfu rfu wp#/acc c3 c3 c 3 c 3 c6 c6 c 6 c 6 c7 c7 c 7 c 7 c8 c8 c 8 c 8 d2 d4 d9 a6 a12 a19 r-ce2 r-ub# a3 a15 f-rst# d3 d3 d 3 d 3 d6 d6 d 6 d 6 d7 d7 d 7 d 7 d8 d8 d 8 d 8 c5 d5 e2 e4 e9 a5 a13 a9 a20 a18 a2 a21 ry/by# e3 e3 e 3 e 3 e6 e6 e 6 e 6 e7 e7 e 7 e 7 e8 e8 e 8 e 8 e5 c4 c4 c 4 c 4 f2 f4 f9 a4 a14 a10 a23 a17 a1 a22 rfu f3 f3 f 3 f 3 f7 f7 f 7 f 7 f8 f8 f 8 f 8 f5 f6 dnu a1 dnu a10 g2 g4 g9 v ss rfu dq6 rfu dq1 a0 a16 rfu g3 g3 g 3 g 3 g7 g7 g 7 g 7 g5 g6 g8 h2 h4 h9 oe# dq15 dq13 dq4 dq9 f-ce# rfu dq3 h3 h3 h 3 h 3 h6 h6 h 6 h 6 h7 h7 h 7 h 7 h8 h8 h 8 h 8 h5 j2 j4 j9 dq0 dq7 dq12 r-v cc dq10 r-ce1# vss f-v cc j3 j3 j 3 j 3 j6 j6 j 6 j 6 j7 j7 j 7 j 7 j8 j8 j 8 j 8 j5 k2 k4 k9 dq8 dq14 dq5 rfu dq2 rfu rfu dq11 k3 k3 k 3 k 3 k7 k7 k 7 k 7 k8 k8 k 8 k 8 k5 k6 l2 l3 l4 l5 l6 l7 l8 l9 rfu rfu rfu rfu rfu rfu rfu f-v cc dnu m1 dnu m10
6 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet figure 5.2 tsb084 physical dimensions 3439 \ 16-038.22 \ 01.04.05 package tsb 084 jedec n/a d x e 11.60 mm x 8.00 mm package symbol min nom max note a --- --- 1.20 profile a1 0.17 --- --- ball height a2 0.81 --- 0.97 body thickness d 11.60 bsc. body size e 8.00 bsc. body size d1 8.80 bsc. matrix footprint e1 7.20 bsc. matrix footprint md 12 matrix size d direction me 10 matrix size e direction n 84 ball count b 0.35 0.40 0.45 ball diameter ee 0.80 bsc ball pitch ed 0.80 bsc ball pitch sd / se 0.40 bsc solder ball placement a2,a3,a4,a5,a6,a7,a8,a9 depopulated solder balls b1,b10,c1,c10,d1,d10 e1,e10,f1,f10,g1,g10 h1,h10,j1,j10,k1,k10,l1,l10 m2,m3,m4,m5,m6,m7,m8,m9 notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jesd 95-1, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. n/a 10 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. c c 0.08 a1 b 84x 0.15 m c mc ab 0.08 6 side view 7 se e1 corner pin a1 a c db d1 a 10 ed 9 8 6 5 3 ee 2 4 7 e d 0.15 c (2x) gfe k jh sd 7 m l 1 c c 0.15 b (2x) 0.20 10 pin a1 corner index mark a2 a top view bottom view
december 8, 2006 s71pl-n_00_a9 s71pl-n mirrorbit tm mcps 7 data sheet figure 5.3 tla084 physical dimensions 3372-2 \ 16-038.22a package tla 084 jedec n/a d x e 11.60 mm x 8.00 mm package symbol min nom max note a --- --- 1.20 profile a1 0.17 --- --- ball height a2 0.81 --- 0.97 body thickness d 11.60 bsc. body size e 8.00 bsc. body size d1 8.80 bsc. matrix footprint e1 7.20 bsc. matrix footprint md 12 matrix size d direction me 10 matrix size e direction n 84 ball count ? b 0.35 0.40 0.45 ball diameter ee 0.80 bsc. ball pitch ed 0.80 bsc ball pitch sd / se 0.40 bsc. solder ball placement a2,a3,a4,a5,a6,a7,a8,a9 depopulated solder balls b1,b10,c1,c10,d1,d10, e1,e10,f1,f10,g1,g10, h1,h10,j1,j10,k1,k10,l1,l10, m2,m3,m4,m5,m6,m7,m8,m9 notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jesd 95-1, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. n/a 10 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. c 0.08 0.20 c a e b c 0.15 (2x) c d c 0.15 (2x) index mark 10 6 b top view side view corner 84x a1 a2 a 0.15 c a b m c m 0.08 pin a1 ml e1 7 se a d1 ed dc e f g h j k 10 8 9 7 6 4 3 2 1 ee 5 b pin a1 corner 7 sd bottom view
8 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet 5.3 S71PL127N?tla064 figure 5.4 64-ball fine-pitch ball grid array (S71PL127N) note: top view?balls facing down. the addresses that are shared vary by mcp combination as shown in the table below: flash-only addresses shared addresses S71PL127Nb0 a22-a21 a20:a0 S71PL127Nc0 a22 a21:a0 a1 a10 b5 b6 c3 c4 c5 c6 c7 c8 d2 d3 d4 d5 d6 d7 d8 d9 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f7 f8 f9 g2 g3 g4 g7 g8 g9 h2 h3 h4 h5 h6 h7 h8 h9 j2 j3 j4 j5 j6 j7 j8 j9 k3 k4 k5 k6 k7 k8 l5 l6 m1 m10 dnu dnu rfu rfu a7 r-lb# f-wp#/ acc we# a8 a11 a3 a6 r-ub# f-rst r-ce2 a19 a12 a15 a2 a5 a18 f-ry/by# a20 a9 a13 a21 a1 a4 a17 a10 a14 a22 a0 v ss dq1 dq6 rfu a16 f-ce# oe# dq9 dq3 dq4 dq13 dq15 rfu r-ce1# dq0 dq10 f-v cc r-v cc dq12 dq7 v ss dq8 dq2 dq11 rfu dq5 dq14 rfu rfu dnu dnu shared flash only psram only do not use/ reserved for future use legend
december 8, 2006 s71pl-n_00_a9 s71pl-n mirrorbit tm mcps 9 data sheet 5.4 s71pl129n?tla064 figure 5.5 64-ball fine-pitch ball grid array (s71pl129n) note: top view?balls facing down. the addresses that are shared vary by mcp combination as shown in the table below: flash-only addresses shared addresses s71pl129nb0 a21 a20:a0 s71pl129nc0 ? a21:a0 a1 a10 b5 b6 c3 c4 c5 c6 c7 c8 d2 d3 d4 d5 d6 d7 d8 d9 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f7 f8 f9 g2 g3 g4 g7 g8 g9 h2 h3 h4 h5 h6 h7 h8 h9 j2 j3 j4 j5 j6 j7 j8 j9 k3 k4 k5 k6 k7 k8 l5 l6 m1 m10 dnu dnu rfu rfu a7 r-lb# f-wp#/ acc we# a8 a11 a3 a6 r-ub# f-rst r-ce2 a19 a12 a15 a2 a5 a18 f-ry/by# a20 a9 a13 a21 a1 a4 a17 a10 a14 f-ce2# a0 v ss dq1 dq6 rfu a16 f-ce1# oe# dq9 dq3 dq4 dq13 dq15 rfu r-ce1# dq0 dq10 f-v cc r-v cc dq12 dq7 v ss dq8 dq2 dq11 rfu dq5 dq14 rfu rfu dnu dnu shared flash only psram only do not use/ reserved for future use legend
10 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet figure 5.6 tla064 physical dimensions 3352 \ 16-038.22a package tla 064 jedec n/a d x e 11.60 mm x 8.00 mm package symbol min nom max note a --- --- 1.20 profile a1 0.17 --- --- ball height a2 0.81 --- 0.97 body thickness d 11.60 bsc. body size e 8.00 bsc. body size d1 8.80 bsc. matrix footprint e1 7.20 bsc. matrix footprint md 12 matrix size d direction me 10 matrix size e direction n 64 ball count b 0.35 0.40 0.45 ball diameter ee 0.80 bsc. ball pitch ed 0.80 bsc ball pitch sd / se 0.40 bsc. solder ball placement a2,a3,a4,a5,a6,a7,a8,a9 depopulated solder balls b1,b2,b3,b4,b7,b8,b9,b10 c1,c2,c9,c10,d1,d10,e1,e10, f1,f5,f6,f10,g1,g5,g6,g10 h1,h10,j1,j10,k1,k2,k9,k10 l1,l2,l3,l4,l7,l8,l9,l10 m2,m3,m4,m5,m6,m7,m8,m9 notes: 1. dimensioning and tolerancing methods per asme y14.5m-1994. 2. all dimensions are in millimeters. 3. ball position designation per jesd 95-1, spp-010. 4. e represents the solder ball grid pitch. 5. symbol "md" is the ball matrix size in the "d" direction. symbol "me" is the ball matrix size in the "e" direction. n is the number of populted solder ball positions for matrix size md x me. 6 dimension "b" is measured at the maximum ball diameter in a plane parallel to datum c. 7 sd and se are measured with respect to datums a and b and define the position of the center solder ball in the outer row. when there is an odd number of solder balls in the outer row sd or se = 0.000. when there is an even number of solder balls in the outer row, sd or se = e/2 8. "+" indicates the theoretical center of depopulated balls. 9. n/a 10 a1 corner to be identified by chamfer, laser or ink mark, metallized mark indentation or other means. c 0.20 c 0.08 c b 64x 6 0.08 m c 0.15 m c a b a2 a a1 side view l m ed corner e1 7 se d1 a b dc e f hg 10 8 9 7 5 6 4 2 3 j k 1 ee sd bottom view pin a1 7 10 index mark c 0.15 (2x) (2x) c 0.15 b a d e pin a1 top view corner
december 8, 2006 s71pl-n_00_a9 s71pl-n mirrorbit tm mcps 11 data sheet 6. revision history section description revision a (march 11, 2005) initial release revision a1 (april 27, 2005) performance characteristics psram density table added 128 mb psram device ordering information and valid combination tables updated options to include 128 mb psram device block diagram changed chip enable pin from ce#f1 to f1-ce# physcial dimensions/connection diagrams replaced vbh084 wit h tla084 and vsa084 replaced vbu056 with tlc056 v cc power up changed t vcs speed from 30 s to 50 s dc characteristics changed i cc4 max. to 50 a revision a2 (august 18, 2005) global removed all references to 56-ball package performance characteristis updated the product selector tables ordering information updated model number valid combinations table added new ordering options connection diagram updated the pl127n connection diagram updated the pl12xn connection diagram revision a3 (october 21, 2005) performance characteristics updated the typical sector erase times revision a4 (november 29, 2005) global added the 1.2 mm option to s71pl256nd0 updated the s29pl-n flash data sheet revision a5 (january 3, 2006) global changed the name of in f3 from a14 to a4 in pinout figure of section 3.2 removed all references to type 6 psrams from the product selector guide added a document reference table modified the package type and material options removed the vsa084 package option removed the datasheet from the mcp wrapper revision a6 (april 12, 2006) global added psram type 7 as an option to S71PL127Nb0 and s71pl129nb0 revision a7 (september 6, 2006) global updated document to new template. revision a8 (october 6, 2006) global added 32 mb psram type 8 to the valid combinations revision a9 (december 8, 2006) global added 64 mb psram type 8 to the valid combinations.
12 s71pl-n mirrorbit tm mcps s71pl-n_00_a9 december 8, 2006 data sheet colophon the products described in this document are designed, developed and manufactured as contemplated for general use, including wit hout limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a s erious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in we apon system), or (2) for any use where chance of failure is intolera ble (i.e., submersible repeater and artifi cial satellite). please note that spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semic onductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection , and prevention of over-c urrent levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restriction s on export under the foreign exchange and foreign trade law of japan, the us export administration regulations or the applicable laws of any oth er country, the prior authorization by the respective government entity will be required for export of those products. trademarks and notice the contents of this document are subject to change without notice. this document may contain information on a spansion product under development by spansion. spansion reserves the right to change or discontinue work on any product without notice. the informati on in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, no n-infringement of th ird-party rights, or any other warranty, exp ress, implied, or statutory. spansion assume s no liability for any damages of any kind arising out of the use of the information in this document. copyright ? 2005-2006 spansion inc. all rights reserved. spansi on, the spansion logo, mirrorbit, ornand, hd-sim, and combinatio ns thereof are trademarks of spansion inc. other names are for informational purposes only and may be trademarks of their respecti ve owners.

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